Very Large Scale Integration

1. VLSI: Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistor-based circuits into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device. The term is no longer as common as it once was, as chips have increased in complexity into the hundreds of millions of transistors. The links below are useful to know more about VLSI design.

VLSI System Design Lecture Slides
VLSI Circuit Design Lecture Slides

Microelectronic Devices and circuits Lecture notes

2. ASIC ( Application Specific Integrated Circuit): A Chip that is customized for a particular use, rather than intended for general-purpose use such as a microprocessor. The use of ASICs improve performance over general-purpose CPUs, because ASICs are "hardwired" to do a specific job and do not incur the overhead of fetching and interpreting stored instructions. However, a standard cell ASIC may include one or more microprocessor cores and embedded software, in which case, it may be referred to as a "system on a chip" (SoC).

A full custom ASIC chip is the most costly, and like standard cell ASICs, use a custom-designed mask for every layer in the chip. Unlike standard cells, designers of a full custom device have total control over the size of every transistor forming every logic gate, so they can "fine tune" each gate for optimum performance. Thus, a full custom ASIC performs electronic operations as fast as it is possible to do so, providing that the circuit design is efficiently architected.

To know more visit the link below.

ASIC Design Flow Tutorial
Analog Design - For Analog design visit this site

3. Verilog: Verilog is a hardware description language (HDL) used to model electronic systems. The language (sometimes called Verilog HDL) supports the design, verification, and implementation of analog, digital, and mixed-signal circuits at various levels of abstraction.

The designers of Verilog wanted a language with syntax similar to the C programming language so that it would be familiar to engineers and readily accepted. The language is case-sensitive, has a preprocessor like C, and the major control flow keywords, such as "if" and "while", are similar. The formatting mechanism in the printing routines and language operators and their precedence are also similar.

The link below has tutorial for verilog. Go through it to gain some knowledge on verilog programming.

Verilog Tutorial

?4. SystemVerilog is a combined Hardware Description Language and Hardware Verification Language based on extensions to Verilog. The link below consists of tutorials for learning SystemVerilog.

SystemVerilog Tutorial

5. SystemC is often thought of as a hardware description language like VHDL and Verilog, but is more aptly described as a system description language, since it exhibits its real power during transaction-level modeling and behavioral modeling. SystemC is a set of library routines and macros implemented in C++, which makes it possible to simulate concurrent processes, each described by ordinary C++ syntax. The link below has tutorials for learning SystemC.

SystemC Tutorial

6. Specman: It is an EDA tool for functional verification of digital system / integrated circuit design, usually in RTL. Verification engineers implement verification environments using e, the first commercial Aspect-oriented programming language. e is currently a proprietary language of Cadence. Specman was originally created by Verisity, which has since been bought by Cadence.
Below are the tutorial links for learning Specman.
Specman Tutorial
Specman Verification

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